Burroughs B6700

UTAS B6700

Burroughs B6700 emulator project

Help us find a complete MCP software release for the Burroughs B6700


Our goal is to develop an emulator for the Burroughs B6700 system. We need help to find a complete release of MCP software for the Burroughs B6700.

If you have old magnetic tapes (magtapes) in any format, or computer printer listings of software or micro-fiche, micro-film, punched-card decks for any Burroughs B6000 or Burroughs B7000 systems we would like to hear from you.

Email nw@retroComputingTasmania.com

What we have found so far is updated in this Google Sheet document: 

https://docs.google.com/spreadsheets/d/1JnMsyE8ssJi_-MUsK0rT9LPtNpeJCpTv1QrFw-917Y8/pubhtml

The aim is to complete the following:

  1. B6700 software restoration - recover ALGOL, ESPOL, MCP and Intrinsics.
  2. B6700 emulator - goal is to be able to run B6700 software on a modern computer
  3. B-series product range - compile a comprehensive description of the various models and their differences
  4. B6700 front-panel replica - along the lines of the B205 project design and construct a replica of a main processor control panel.
  5. Burroughs machines in Tasmania - Discover and identify - UTAS had both a B6700 and B6800(?) in the Computing Centre and a B1700 in Administration. Savings Bank of Tasmania (SBT) had a B6800 (to be confirmed) and later an A-series system (Unisys).
The University of Tasmania Computing Centre operated a Burroughs B6700 mainframe as a replacement for the previously long-running Elliott 503 jointly operated by the Hydro Electric Commission and University.

Burroughs B6700 Large-scale system

The B6700 operated on a double clock cycle, a low-speed for the multiplexor and non-arithmetic instructions, and a higher clock speed only for arithmetic instructions. The low-speed was either 2.5MHz or 5MHz, with the latter the most common. The arithmetic instructions ran at 5MHz or 10MHz. The speed settings could be changed in the field when the customer paid for the upgrade. Memory cycle time was one of 0.5 usec, 1.2 usec or 1.5 usec.

Known B6700 installations in Australasia



Photo by Ralph K, Monash University B6700, circa early 1980s

Product range (marchitecture)

This is an attempt to reconcile various statements made about Burroughs "large systems" models which were released, renamed, superseded or omitted and so on. For example, the wikipedia page does not mention the B5900 despite the linked article at the bottom of the page to a long description from the "father of the B5900 System".


000- series500-series700-series800-series900-series Date Notes (many taken from Jack Hoaroots)
B5000   
 1961 Hardware implementation problems, replaced with B5500
 B5500  
 1965 Essentially the B5000 with disk instead of drum and improved software.
 B6500  
 1968 or 1969 Like the B5000, had reliability problems and quickly replaced with the B6700. All were field upgraded to B6700s
 B8500   1968 - 1970Never delivered due to engineering problems
     1970Last B5500 manufactured
   B5700  1970 
   B6700 
 1971 Max of 1M word (48-bit word + 4 tag bits), 6MBytes memory
1 - 3 CPUs and 1-2 I/O Processors
All B6500s were field upgraded to B6700 to correct engineering problems with the B6500
   B7700 
 1972 Initially up to 4 CPUs and 2 I/O processors but later up to 8 CPUs
   B6800
 1976 high performance, lower cost version of the B6700 with a new memory architecture (so-called Global Memory Architecture supporting multi-processor operation)
   B7800 
 1977  
    B5900 1980 First E-mode implementation (consolidation of all the previous models instruction sets) implemented loadable microcode. Had 4 Display registers D[0], D[1]. D[2], D[LL], where LL refers to the current lexical level.
    B6900 1980 Last of the "E-mode" machines implemented in hardware, 99% compatible with the E-mode design.
    B7900 1983?  
 
  A-series

B6700 Display Panel

Burroughs Maintenance Diagnostics Logic (MDL) display





The B6700 Display Panel is a somewhat complex arrangement of overlays as most of the panels above are shared between CPU and IO processors and different control groups (Memory Controller, Arithmetic Controller, Interrupt Controller etc). The Display Panel (DP) consists of switches, lights, and combined switch-lights (illuminated push button switches). Most of the bits within registers are combined switch-lights so the state of a register bit can be both seen and manipulated from the DP. Apparently, when operators were bored and the machine was hopefully(!) not busy a popular game was to play russian-roulette, pick a random register bit, flip its state and see how many times bits can be changed before the machine crashed or DS'd (discontinued) a job.

Panel A

Panel A shows the important programmer visible registers of the selected CPU. From top to bottom of Panel A is:

  1. P register (51-bits) - 
  2. C register (51-bits) - temporary register for some operations and memory cycle states
  3. A register (51-bits) - this is the top-of-stack register
  4. B register (51-bits) - this the second word in the stack
  5. X register (51-bits) - X is an extension word for A when processing double-precision operands.
  6. Y register (51-bits) - Y is an extension word for B when processing double-precision operands.

An interesting feature of Panel A due to its display of the TOS registers, when the CPU was idle the MCP arranged the bit pattern to appear in the TOS registers to display a large letter B (for Burroughs) as can be seen in the picture above. This letter "B" would flicker on and off (replaced with other patterns of lights) as the MCP switched between idle and busy states.

Tasmanian connection

  • Exact installation, commission and de-commissioning dates for the UTAS B6700 to be discovered

    Burroughs Model III B6700 processor with vector mode hardware, 196k words of main store, 4 pack drives etc with MCP Version 11.8 - from: Pascal User Group Newsletter (PUGN) #6, Letter from AJH Sale, dated 8-Nov-1976 - as the machine was commissioned in late 1975 this configuration is likely close to what was initially delivered.

  • Configuration details of the UTAS B6700 still to be determined.
  • Due to the high cost of Burroughs memory, memory expansion for the B6700 was undertaken using a local design. The memory expansion took the machine to its maximum memory (1MW or 6MB)
  • At the time of installation the UTAS B6700 may have been the largest machine installed in Tasmania - compare with the State Government Unisys 1108 installed sometime in the 1970s(?)
  • Professor Sale and colleagues constructed a B6700 Pascal compiler which was later sold to Burroughs as their official Pascal compiler
  • At some stage the B6700 was upgraded to a later model, either a B6800 or B6900

B5700/B6700 Cactus stack

Links

  1. Development history of the B5900
  2. Stories about the B5000 and people who were there, Richard Waychoff (includes detail on the Burroughs ALGOL compiler and in particular STREAM procedures)
  3. Burroughs B5000 Descriptor
  4. The Burroughs B 5000 Conference 6 September 1985, Marina Del Ray Hotel
  5. Segment Sizes and Lifetimes in ALGOL 60 Programs, AP Batson and RE Brundage, University of Virginia, CACM January 1977
  6. The architecture of the Burroughs B5000 - 20 years Later and Still Ahead of the Times? published in 1982